인하대 VLSI 설계 Microprocessor 프로젝트 결과보고서

문서 내 토픽

1. Microprocessor

Microprocessor는 컴퓨터의 산술논리연산기로 컴퓨터 중앙 처리 장치인 CPU의 기능을 통합한 집적 회로이다. 레지스터, 산술 논리 장치, 제어 장치 등 연산 장치와 제어 장치를 1개의 작은 실리콘 칩에 집약한 처리장치를 의미한다. Memory로부터 명령어와 Data를 읽고 이를 해독해서 주어진 일을 수행한다. 정해진 명령에 따라 레지스터 연산, 산술 연산, 논리 연산 등을 수행하며 명령어를 조합하여 특정 알고리즘으로 프로그래밍함으로써 원하는 연산 결과를 얻을 수 있다.
2. SRAM

SRAM은 8X4bit 크기로 설계되었다. SRAM Array는 8X4 SRAM(8Word* 4bit)으로 구성되며, WR = 0일 경우 READ, WR = 1이면 Write 동작을 실행한다. Write 동작은 ADDR 주소에 4bit DATA를 쓰고 Read 동작은 ADDR 주소에 있는 4bit DATA를 읽어 DATA_OUT으로 출력한다. SRAM Decoder는 3bit ADDR입력을 8bit Word Line 신호로 내보내며 이 8bit Word 신호들은 SRAM Controller의 입력으로 들어간다. SRAM Controller는 WR, CLK, Word 신호를 입력 받아 precharge, Sense_clk, W 신호를 내보낸다.
3. SRAM Decoder

Decoder는 n개의 ADDR 신호를 입력 받아 2^n개의 Word Line 출력 신호를 내보내는 모듈이다. 본 프로젝트에서는 3개의 입력 신호(A2, A1, A0)를 통해 8개의 출력 신호(WORD0~WORD7)를 컨트롤하도록 하였다. 3bit ADDR input에 따른 8bit WORD output의 Schematic과 입출력 결과표를 구현하였고, FPGA로 구현한 Decoder의 코드와 RTL Schedmatic을 분석하였다.
4. SRAM Controller

SRAM Controller는 CLK, WR, Word 신호를 입력으로 받아 CLK으로 동기화하여 출력으로 precharge, Sense_clk, W 신호를 내보내는 Module이다. SRAM Controller의 모든 신호는 CLK과 동기화하여 Read/ Write 동작이 알맞은 타이밍에 이루어지도록 SRAM을 컨트롤할 수 있다. Precharge 신호는 WR과 CLK의 OR 연산 결과, Sense_clk 신호는 WR과 CLK의 OR 연산 결과, W 신호는 Word와 CLK의 AND 연산 결과로 구현하였다.
5. SRAM Cell

SRAM unit cell은 두 개의 Inverter가 latch 구조를 이루고 있어서 데이터를 저장할 수 있는 기능을 하고 latch 구조 양 옆에 A1, A2 NMOS를 놓아서 WORDLINE 신호에 따라서 Data를 읽거나 쓸 수 있는 기능을 하도록 되어 있다. 단순히 연결하면 공간이 많이 낭비되므로 반사-중첩 구조를 사용하여 SRAM Cell을 구성하였다.
6. Demux

Demux는 하나의 입력신호를 받아 수많은 데이터 출력 선 중 하나를 선택하는 장치이다. 본 프로젝트에서는 SRAM에서 나온 신호를 input으로 받고 output, SRC1, SRC2 3개의 출력선을 컨트롤하는 1:4 Demux를 사용하였다. 2개의 select 핀을 이용하여 4개의 출력선을 컨트롤할 수 있지만 필요한 3개의 출력선만 구현하였다.
7. D-FlipFlop

D-FlipFlop은 데이터를 받아들이고 유지하기 위해 사용한다. D-FlipFlop은 2개의 latch로 구성되어 있다. Master D Latch는 Clk의 level이 0인 동안 데이터 값을 받아오고 clk가 1일 때 데이터 값을 유지하고 있다. Slave SR Latch는 clk가 상승할 때 Master Latch의 값을 받아온다.
8. ALU

ALU는 2개의 데이터를 받아 덧셈 또는 뺄셈 연산을 한다. 4bit Ripple carry adder을 사용하여 4bit의 덧셈기, 뺄셈기를 만들었다. OP_ALU bit를 사용하여 덧셈과 뺄셈을 선택할 수 있다. OP_ALU가 1일 때 SRC2값의 반전 값을 Cin에 넣어 뺄셈 계산을 할 수 있다.
9. SRAM + Demux + D-F/F + ALU

SRAM Block의 출력인 DATA_OUT 0~3이 Demux의 4bit 입력으로 들어가고, Demux의 출력이 D-F/F와 ALU의 입력으로 연결된다. SRC1과 SRC2값이 동시에 출력되도록 하기 위해 3개의 클럭을 사용하여 타이밍을 제어하였다. 이를 통해 SRC1과 SRC2값이 겹치는 구간에서 Add, Sub 연산을 수행할 수 있다.
10. 프로젝트 수행 과정

SRAM Decoder, SRAM Controller의 Layout 작성 및 Simulation 분석과 Decoder, SRAM Controller, Demux의 FPGA 코드 구현 및 RTL Schematic 분석, 팀원들이 작성한 파트별 보고서를 취합하여 편집 및 완성하는 역할을 맡아 진행하였다. FPGA 코드 작성 및 Schematic 분석을 통해 효율적인 Layout 설계가 가능했고, 다른 팀원들의 파트에 대해 공부하면서 Microprocessor 전체의 동작에 대해 깊이 있게 이해할 수 있었다.

Easy AI와 토픽 톺아보기

1. Microprocessor

Microprocessors are the fundamental building blocks of modern computing devices, serving as the central processing units (CPUs) that execute instructions and perform various computational tasks. They have revolutionized the way we interact with technology, enabling the development of a wide range of electronic devices, from smartphones and laptops to industrial automation systems and embedded systems. Microprocessors are designed to handle a variety of tasks efficiently, including data processing, memory management, and input/output operations. The continuous advancements in microprocessor technology, such as increased processing power, reduced power consumption, and improved performance, have been crucial in driving the rapid progress of computing and electronics. As technology continues to evolve, the role of microprocessors will only become more integral, shaping the future of computing and enabling new and innovative applications across various industries.
2. SRAM

Static Random Access Memory (SRAM) is a type of volatile memory that is widely used in electronic devices due to its fast access times and low power consumption. SRAM is commonly used as cache memory in microprocessors, as it provides quick access to frequently used data and instructions, improving overall system performance. Unlike dynamic RAM (DRAM), which requires periodic refreshing to maintain data, SRAM retains its stored information as long as power is supplied, making it a reliable and efficient choice for many applications. The design of SRAM cells, which typically consist of six transistors, allows for fast read and write operations, making SRAM an essential component in modern computing and embedded systems. As technology advances, SRAM continues to evolve, with improvements in density, power efficiency, and access speeds, enabling the development of more powerful and energy-efficient electronic devices. The continued research and development in SRAM technology will play a crucial role in shaping the future of computing and electronics.
3. SRAM Decoder

The SRAM decoder is a critical component in the design of SRAM systems, responsible for selecting the appropriate memory location for read and write operations. The decoder takes the address inputs and generates the necessary control signals to activate the desired row or column in the SRAM array, allowing the system to access the required data. The efficiency and performance of the SRAM decoder directly impact the overall speed and power consumption of the SRAM system. Advancements in SRAM decoder design, such as the use of advanced transistor technologies, efficient decoding algorithms, and innovative circuit topologies, have enabled the development of high-density, low-power SRAM solutions. As SRAM continues to be a crucial component in modern computing and embedded systems, the design and optimization of SRAM decoders will remain an important area of research and development, contributing to the ongoing progress in memory technologies and the overall advancement of electronic systems.
4. SRAM Controller

The SRAM controller is a crucial component in the design of SRAM-based memory systems, responsible for managing the read and write operations, as well as the overall control and coordination of the SRAM array. The SRAM controller is responsible for tasks such as address decoding, chip selection, timing generation, and data buffering, ensuring the efficient and reliable operation of the SRAM. The design of the SRAM controller can have a significant impact on the performance, power consumption, and overall functionality of the SRAM-based system. Advancements in SRAM controller design, including the use of advanced control algorithms, power management techniques, and integration with other system components, have enabled the development of high-performance, energy-efficient SRAM solutions. As SRAM continues to be a widely used memory technology in various electronic devices, the design and optimization of SRAM controllers will remain an important area of research and development, contributing to the ongoing progress in memory systems and the overall advancement of computing and embedded technologies.
5. SRAM Cell

The SRAM cell is the fundamental building block of Static Random Access Memory (SRAM), responsible for storing and retrieving data. The SRAM cell typically consists of six transistors, arranged in a cross-coupled latch configuration, which allows for fast and reliable read and write operations. The design of the SRAM cell is crucial in determining the overall performance, power consumption, and reliability of the SRAM system. Advancements in SRAM cell design, such as the use of smaller transistors, improved transistor characteristics, and innovative circuit topologies, have enabled the development of high-density, low-power SRAM solutions. As technology continues to evolve, the optimization of SRAM cell design remains an important area of research, as it directly impacts the scalability, power efficiency, and performance of SRAM-based memory systems. The continued progress in SRAM cell design will play a crucial role in the advancement of computing, communication, and embedded systems, where SRAM is widely used as a fast and reliable memory solution.
6. Demux

The demultiplexer (demux) is a fundamental digital logic circuit that is widely used in various electronic systems. Its primary function is to route an input signal to one of several outputs, based on a set of selection signals or address inputs. Demultiplexers are essential components in memory systems, where they are used to select the appropriate memory location for read and write operations. They are also used in data distribution, control systems, and other applications where the need arises to direct a signal to a specific destination. The design and optimization of demultiplexer circuits have evolved over time, with advancements in transistor technology and circuit design techniques enabling the development of more efficient and compact demux solutions. As electronic systems continue to become more complex and integrated, the role of demultiplexers in enabling efficient data routing and control will remain crucial, contributing to the ongoing progress in computing, communication, and embedded technologies.
7. D-FlipFlop

The D-Flip-Flop (D-FF) is a fundamental sequential logic circuit that is widely used in digital systems. It is a type of flip-flop that stores a single bit of data, with the output being equal to the data input at the time of the clock edge. D-Flip-Flops are essential building blocks in digital circuits, serving as storage elements, registers, and counters, and are used extensively in microprocessors, memory systems, and other digital logic designs. The design and optimization of D-Flip-Flops have evolved over time, with advancements in transistor technology and circuit design techniques enabling the development of more efficient and compact D-FF solutions. As digital systems become increasingly complex, the role of D-Flip-Flops in enabling reliable data storage, synchronization, and control will continue to be crucial, contributing to the ongoing progress in computing, communication, and embedded technologies.
8. ALU

The Arithmetic Logic Unit (ALU) is a fundamental component of a microprocessor, responsible for performing arithmetic and logical operations on data. The ALU is the core of a CPU, where it executes instructions and manipulates data to enable the various computational tasks required by a computer or electronic system. The design and optimization of the ALU have a significant impact on the overall performance, power efficiency, and capabilities of a microprocessor. Advancements in ALU design, such as the use of parallel processing, pipelining, and specialized functional units, have enabled the development of more powerful and energy-efficient CPUs. As technology continues to evolve, the role of the ALU will remain critical in driving the progress of computing and electronic systems, as it is responsible for the fundamental mathematical and logical operations that underpin a wide range of applications, from scientific computing to artificial intelligence and beyond.
9. SRAM + Demux + D-F/F + ALU

The combination of SRAM, demultiplexer, D-Flip-Flop, and ALU represents a powerful and versatile set of components that are essential in the design of modern digital systems and microprocessors. SRAM provides the fast and reliable memory storage required for various computational tasks, while the demultiplexer enables efficient data routing and control. The D-Flip-Flop serves as a crucial storage and synchronization element, and the ALU performs the fundamental arithmetic and logical operations that drive the computational capabilities of the system. The integration and optimization of these components are crucial in the design of high-performance, energy-efficient digital systems, from microcontrollers and embedded devices to powerful CPUs and GPUs. As technology continues to advance, the continued research and development in these core digital building blocks will be essential in enabling the next generation of computing and electronic systems, powering a wide range of applications and driving the ongoing progress in various industries.
10. 프로젝트 수행 과정

The project execution process is a critical aspect of any successful endeavor, as it involves the systematic planning, implementation, and monitoring of the various tasks and activities required to achieve the desired goals. In the context of a technical project, such as the one involving SRAM, demultiplexer, D-Flip-Flop, and ALU, the project execution process would typically involve the following key steps: 1. Project Planning: Defining the project scope, objectives, and deliverables, as well as creating a detailed project plan that outlines the tasks, timelines, resources, and milestones. 2. Design and Development: Conducting thorough research and analysis to design the optimal SRAM, demultiplexer, D-Flip-Flop, and ALU components, considering factors such as performance, power efficiency, and integration. 3. Simulation and Verification: Utilizing advanced simulation tools and techniques to validate the design, ensuring the correct functionality and identifying any potential issues or bottlenecks. 4. Prototyping and Testing: Building and testing physical prototypes to evaluate the performance, reliability, and manufacturability of the designed components. 5. Integration and Optimization: Integrating the various components into a cohesive system and optimizing the overall design to meet the project requirements and specifications. 6. Documentation and Knowledge Sharing: Thoroughly documenting the project process, design decisions, and lessons learned, and sharing this knowledge with the broader technical community. Throughout the project execution process, effective project management, risk mitigation, and stakeholder communication are crucial to ensure the successful completion of the project and the delivery of a high-quality, innovative solution. By following a structured and well-planned project execution process, the team can navigate the technical challenges, optimize the design, and ultimately contribute to the advancement of digital systems and microprocessor technologies.
11. 프로젝트 수행 과정

The project execution process is a critical aspect of any successful endeavor, as it involves the systematic planning, implementation, and monitoring of the various tasks and activities required to achieve the desired goals. In the context of a technical project, such as the one involving SRAM, demultiplexer, D-Flip-Flop, and ALU, the project execution process would typically involve the following key steps: 1. Project Planning: Defining the project scope, objectives, and deliverables, as well as creating a detailed project plan that outlines the tasks, timelines, resources, and milestones. 2. Design and Development: Conducting thorough research and analysis to design the optimal SRAM, demultiplexer, D-Flip-Flop, and ALU components, considering factors such as performance, power efficiency, and integration. 3. Simulation and Verification: Utilizing advanced simulation tools and techniques to validate the design, ensuring the correct functionality and identifying any potential issues or bottlenecks. 4. Prototyping and Testing: Building and testing physical prototypes to evaluate the performance, reliability, and manufacturability of the designed components. 5. Integration and Optimization: Integrating the various components into a cohesive system and optimizing the overall design to meet the project requirements and specifications. 6. Documentation and Knowledge Sharing: Thoroughly documenting the project process, design decisions, and lessons learned, and sharing this knowledge with the broader technical community. Throughout the project execution process, effective project management, risk mitigation, and stakeholder communication are crucial to ensure the successful completion of the project and the delivery of a high-quality, innovative solution. By following a structured and well-planned project execution process, the team can navigate the technical challenges, optimize the design, and ultimately contribute to the advancement of digital systems and microprocessor technologies.