4Bit, 16bit CLA Adder

소개글

디지털공학에 필요한 CLA Adder만드는 법입니다 .

목차

1. 4Bit CLA Adder Source Code
2. 4 Bit 컴파일 & 시뮬레이션 파일
3. 16Bit CLA Adder Source Code
4.. 16 Bit 컴파일 & 시뮬레이션 파일

본문내용

4Bit CLA Adder Source Code
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity CLA_4bit is
Port ( a : in std_logic_vector(3 downto 0);
b : in std_logic_vector(3 downto 0);
cin: in std_logic;
pout : out std_logic;
gout : out std_logic;
sum : out std_logic_vector(3 downto 0));
end CLA_4bit;

<중 략>

begin
adder0_3: component CLA_4bit port map(a=>a(3 downto 0), b=>b(3 downto 0), cin=>cin,
pout=>p(0),gout=>g(0),sum=>sum(3 downto 0));

adder4_7: component CLA_4bit port map(a=>a(7 downto 4), b=>b(7 downto 4), cin=>carry4,
pout=>p(1),gout=>g(1),sum=>sum(7 downto 4));

adder8_11: component CLA_4bit port map(a=>a(11 downto 8), b=>b(11 downto 8), cin=>carry8,
pout=>p(2),gout=>g(2),sum=>sum(11 downto 8));

adder12_15: component CLA_4bit port map(a=>a(15 downto 12), b=>b(15 downto 12), cin=>carry12,
pout=>p(3),gout=>g(3),sum=>sum(15 downto 12));

참고 자료

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