arithmetic circuit design(결과)

소개글

arithmetic circuit design(결과)

목차

1. Experiment Result
(1) 4-bit Adder / Subtracter
(2) 4-bit ALU

2. Discussion

3. Reference

본문내용

④ Discuss the reason of time delay(time from input to output) measured by MAX+PLUS II > Timing Analyzer. If we use clock to design the circuit, find out the maximum operating frequency, and explain why.
1) gate transmit time(propagation delay)
When the signal transmit gate, (for some physical reason) it has some delay. In practical, each gate is made of many kinds of transistors and circuit elements. Each element has the function that the gate operates properly. However, in the progress, it makes the propagation delay. And every gates, when the signal is propagated, they cause delay.
2) Multiple input at many Gate simultaneous
If a circuit has lots of gate and multiple inputs, they make some delay time. For example, we observe 4-bit adder/subtracter. When we calculate, second position(adder) calculation needs first position`s output(that is carry). So second position needs more time than first position.

참고 자료

- Contemporary Logic Design, Randy H.Katz, 2nd Edition
- Fundamental of Logic Design ( 5th Edition ), Charles H. Roth jr
- www.naver.com
- 전기전자 기초 실험 영어 최종본 version 2