소개글
VHDL을 이용한 클럭입력을 갖는 4비트 레지스터의 설계 입니다.인터페이스..
port(
clk : in std_logic;
i : in std_logic_vector( 3 downto 0 );
a : out std_logic_vector( 3 downto 0 )
);
실행환경
Quartus ∥ Web Edition 8.0
추가 사항
시뮬레이션을 위한 웨이브폼 파일도 추가되어 있습니다.
컴파일 실행환경
Quartus ∥ Web Edition 8.0압축파일 내 파일목록
d_ff.vhd
reg_4big.asm.rpt
reg_4big.done
reg_4big.fit.rpt
reg_4big.fit.summary
reg_4big.flow.rpt
reg_4big.map.rpt
reg_4big.map.summary
reg_4big.pin
reg_4big.pof
reg_4big.qpf
reg_4big.qsf
reg_4big.qws
reg_4big.sim.rpt
reg_4big.sof
reg_4big.tan.rpt
reg_4big.tan.summary
reg_4big.vhd
reg_4big.vhd.bak
reg_4big.vwf
db/prev_cmp_reg_4big.asm.qmsg
db/prev_cmp_reg_4big.fit.qmsg
db/prev_cmp_reg_4big.map.qmsg
db/prev_cmp_reg_4big.qmsg
db/prev_cmp_reg_4big.tan.qmsg
db/reg_4big.(0).cnf.cdb
db/reg_4big.(0).cnf.hdb
db/reg_4big.(1).cnf.cdb
db/reg_4big.(1).cnf.hdb
db/reg_4big.asm.qmsg
db/reg_4big.asm_labs.ddb
db/reg_4big.cbx.xml
db/reg_4big.cmp.bpm
db/reg_4big.cmp.cdb
db/reg_4big.cmp.ecobp
db/reg_4big.cmp.hdb
db/reg_4big.cmp.logdb
db/reg_4big.cmp.rdb
db/reg_4big.cmp.tdb
db/reg_4big.cmp0.ddb
db/reg_4big.db_info
db/reg_4big.eco.cdb
db/reg_4big.eds_overflow
db/reg_4big.fit.qmsg
db/reg_4big.fnsim.hdb
db/reg_4big.fnsim.qmsg
db/reg_4big.hier_info
db/reg_4big.hif
db/reg_4big.map.bpm
db/reg_4big.map.cdb
db/reg_4big.map.ecobp
db/reg_4big.map.hdb
db/reg_4big.map.logdb
db/reg_4big.map.qmsg
db/reg_4big.map_bb.cdb
db/reg_4big.map_bb.hdb
db/reg_4big.map_bb.hdbx
db/reg_4big.map_bb.logdb
db/reg_4big.pre_map.cdb
db/reg_4big.pre_map.hdb
db/reg_4big.psp
db/reg_4big.root_partition.cmp.atm
db/reg_4big.root_partition.cmp.dfp
db/reg_4big.root_partition.cmp.hdbx
db/reg_4big.root_partition.cmp.logdb
db/reg_4big.root_partition.cmp.rcf
db/reg_4big.root_partition.map.atm
db/reg_4big.root_partition.map.hdbx
db/reg_4big.root_partition.map.info
db/reg_4big.rpp.qmsg
db/reg_4big.rtlv.hdb
db/reg_4big.rtlv_sg.cdb
db/reg_4big.rtlv_sg_swap.cdb
db/reg_4big.sgate.rvd
db/reg_4big.sgate_sm.rvd
db/reg_4big.sgdiff.cdb
db/reg_4big.sgdiff.hdb
db/reg_4big.signalprobe.cdb
db/reg_4big.sim.cvwf
db/reg_4big.sim.hdb
db/reg_4big.sim.qmsg
db/reg_4big.sim.rdb
db/reg_4big.simfam
db/reg_4big.sld_design_entry.sci
db/reg_4big.sld_design_entry_dsc.sci
db/reg_4big.syn_hier_info
db/reg_4big.tan.qmsg
db/reg_4big.tis_db_list.ddb
db/reg_4big.tmw_info
db/wed.wsf
reg_4big.asm.rpt
reg_4big.done
reg_4big.fit.rpt
reg_4big.fit.summary
reg_4big.flow.rpt
reg_4big.map.rpt
reg_4big.map.summary
reg_4big.pin
reg_4big.pof
reg_4big.qpf
reg_4big.qsf
reg_4big.qws
reg_4big.sim.rpt
reg_4big.sof
reg_4big.tan.rpt
reg_4big.tan.summary
reg_4big.vhd
reg_4big.vhd.bak
reg_4big.vwf
db/prev_cmp_reg_4big.asm.qmsg
db/prev_cmp_reg_4big.fit.qmsg
db/prev_cmp_reg_4big.map.qmsg
db/prev_cmp_reg_4big.qmsg
db/prev_cmp_reg_4big.tan.qmsg
db/reg_4big.(0).cnf.cdb
db/reg_4big.(0).cnf.hdb
db/reg_4big.(1).cnf.cdb
db/reg_4big.(1).cnf.hdb
db/reg_4big.asm.qmsg
db/reg_4big.asm_labs.ddb
db/reg_4big.cbx.xml
db/reg_4big.cmp.bpm
db/reg_4big.cmp.cdb
db/reg_4big.cmp.ecobp
db/reg_4big.cmp.hdb
db/reg_4big.cmp.logdb
db/reg_4big.cmp.rdb
db/reg_4big.cmp.tdb
db/reg_4big.cmp0.ddb
db/reg_4big.db_info
db/reg_4big.eco.cdb
db/reg_4big.eds_overflow
db/reg_4big.fit.qmsg
db/reg_4big.fnsim.hdb
db/reg_4big.fnsim.qmsg
db/reg_4big.hier_info
db/reg_4big.hif
db/reg_4big.map.bpm
db/reg_4big.map.cdb
db/reg_4big.map.ecobp
db/reg_4big.map.hdb
db/reg_4big.map.logdb
db/reg_4big.map.qmsg
db/reg_4big.map_bb.cdb
db/reg_4big.map_bb.hdb
db/reg_4big.map_bb.hdbx
db/reg_4big.map_bb.logdb
db/reg_4big.pre_map.cdb
db/reg_4big.pre_map.hdb
db/reg_4big.psp
db/reg_4big.root_partition.cmp.atm
db/reg_4big.root_partition.cmp.dfp
db/reg_4big.root_partition.cmp.hdbx
db/reg_4big.root_partition.cmp.logdb
db/reg_4big.root_partition.cmp.rcf
db/reg_4big.root_partition.map.atm
db/reg_4big.root_partition.map.hdbx
db/reg_4big.root_partition.map.info
db/reg_4big.rpp.qmsg
db/reg_4big.rtlv.hdb
db/reg_4big.rtlv_sg.cdb
db/reg_4big.rtlv_sg_swap.cdb
db/reg_4big.sgate.rvd
db/reg_4big.sgate_sm.rvd
db/reg_4big.sgdiff.cdb
db/reg_4big.sgdiff.hdb
db/reg_4big.signalprobe.cdb
db/reg_4big.sim.cvwf
db/reg_4big.sim.hdb
db/reg_4big.sim.qmsg
db/reg_4big.sim.rdb
db/reg_4big.simfam
db/reg_4big.sld_design_entry.sci
db/reg_4big.sld_design_entry_dsc.sci
db/reg_4big.syn_hier_info
db/reg_4big.tan.qmsg
db/reg_4big.tis_db_list.ddb
db/reg_4big.tmw_info
db/wed.wsf