디지털논리회로실험(Verilog HDL) - Numbers and Displays

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디지털논리회로실험 레포트

목차

1. 관련이론
2. 실험

본문내용

1. 관련이론
◉ Multiple-Output Circuits
- Many circuits have more than one output
- Can give each a separate circuit, or can share gates
- Ex: BCD to 7-Segment Converter

◉ Decoder : Popular combinational logic building block, in addition to logic gates
- Converts input binary number to one high output

# 2-input decoder : four possible input binary numbers
- So has four outputs, one for each possible input binary number

# Internal Design
- AND gate for each output to detect input combination

# Decoder with enable e
- Outputs all 0 if e=0
- Regular behavior if e=1

참고 자료

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