arithmetic circuit design(예비)
- 최초 등록일
- 2011.07.09
- 최종 저작일
- 2009.03
- 11페이지/ 한컴오피스
- 가격 1,000원
* 본 문서는 한글 2005 이상 버전에서 작성된 문서입니다.
한글 2002 이하 프로그램에서는 열어볼 수 없으니, 한글 뷰어프로그램(한글 2005 이상)을 설치하신 후 확인해주시기 바랍니다.
소개글
arithmetic circuit design(예비)
목차
1. Objective
2. Theory
(1) 4-bit Adder / Subtracter
(2) 4-bit ALU
3. Reference
본문내용
1. Objective
Understand the expression of negative binary number and 4-bit adder/subtracter with verilog simulation and FPGA Kit. Based on what we`ve learned before, make ALU(Arithmetic Logic Unit) verilog code capable of 4-bit logic and arithmetic calculation. Then verify this with simulation and FPGA Kit.
2. Theory
(1) 4-bit Adder / Subtracter
The simplest adder is composed of half adder and full adder. But subtracter is exceptional. If we design the circuit which subtracts number just like we do, it needs extra circuit, which is undesirable. To solve this problem, adder/subtracter in digital circuit uses specific number. This is called two`s complement number. With this number, we can implement both adder and subtracter in one circuit.
참고 자료
- Contemporary Logic Design ( 2th Edition ), Randy H.Katz
- Wikipedia dictionary
- Naver 백과사전
- Fundamental of Logic Design ( 5th Edition ), Charles H. Roth jr