VHDL을 이용한 Digital clock설계

소개글

VHDL을 이용하여 시계, 타이머, 달력, 알람의 기능을 갖는 디지털 시계를 구현.
Block diagram, State Machine, Realization of operation, Analysis waveform, VHDL source code이 포함되어 있습니다.

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목차

1. Block diagram

2. State Machine

3. Realization of operation

4. Analysis waveform

5. VHDL source code

본문내용

※ Sequence of Mode_1: Clock ➡ Date ➡ Timer ➡ Alram
① Clock: s_1~s_2 : Express time
s_3~s_4 : Express minute
s_5~s_6 : Express sec
Mode2(setting): Push the button of No.3 one time, then set the time.
Push the button of No.3 two times, then set the minute.
Push the button of No.3 three times, then the clock is
normal state.
And push the button of No.1 then, add the state.
② Date: s_1~s_2 : Express the month
s_5~s_6 : Express the month
※ Mode2(setting): Push the button of No.3 one time, then set the month
Push the button of No.3 two times, then set the date.
Push the button of No.3 three times, then the clock is
normal state.
And push the button of No.1 then, add the state.
③ Timer: s_1~s_2 : Express the minute.
s_3~s_4 : Express the sec.
s_5~s_6 : Express the 1/100sec
※ Mode2(setting): Push the button of No.3 one time, then start the timer.
Push the button of No.3 two times, then stop the timer.
Push the button of No.3 three times, then timer is reset

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