[정보통신] 4bit 비동기식 카운터

목차

4bit 비동기식 카운터
T-플립플롭

본문내용

library ieee;
use ieee.std_logic_1164.all;

entity count_16_as is
port (clk : in std_logic;
count_out : out std_logic_vector(3 downto 0));
end count_16_as;

architecture sample of count_16_as is
component t_ff
port (clk : in std_logic;
q : out std_logic);
end component;
signal si : std_logic_vector(3 downto 0);
begin
ff1 : t_ff port map(clk, si(0));
gen1 : for i in 1 to 3 generate
ff2 : t_ff port map(si(i-1), si(i));
end generate gen1;
count_out <= si;
end sample;

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