[통신, 전자, HDL, Verilog] DDFSM

등록일 2003.06.12 압축파일 (zip) | 10페이지 | 가격 3,000원

*해당 문서는 미리보기가 지원되지 않습니다.

컴파일 실행환경

DDFSM을 Verilog로 구현

본문내용

직접 코딩한 DDFSM (Verilog로 구현)

압축파일내 파일목록

ddfsm.hif
ddfsm.acf
ddfsm/ddfsm.alb
ddfsm/ddfsm.ucf
ddfsm/ddfsm.prj
ddfsm/ddfsm.EDF
ddfsm/ddfsm_sine.vhd
ddfsm/ddfsm_sine.log
ddfsm/ddfsm_sine.er
ddfsm/express.ini
ddfsm/ddfsm_cos.vhd
ddfsm/ddfsm_cos.log
ddfsm/ddfsm_cos.er
ddfsm/S95.log
ddfsm/ddfsm.bak
ddfsm/ddfsm.vhd
ddfsm/ddfsm.log
ddfsm/ddfsm.er
ddfsm/xproj.ini
ddfsm/ddfsm.acf
ddfsm/ddfsm.mmf
ddfsm/U6823242.DLS
ddfsm/U6515819.DLS
ddfsm/U4114299.DLS
ddfsm/LIB.DLS
ddfsm/ddfsm.hif
ddfsm/lib/DDFSM.DIR
ddfsm/lib/DDFSM.HDR
ddfsm/lib/DDFSM.GNR
ddfsm/lib/DDFSM.SYN
ddfsm/lib/DDFSM.PIN
ddfsm/lib/DDFSM.BLK
ddfsm/lib/DDFSM.SYM
ddfsm/lib/DDFSM.MAP
ddfsm/lib/DDFSM.INI
ddfsm/lib/DDFSM.VIS
ddfsm/lib/DDFSM.FIG
ddfsm/lib/DDFSM.MOD
ddfsm/lib/DDFSM.NET
ddfsm/lib/DDFSM.FLG
ddfsm/lib/DDFSM.ID
ddfsm/xproj/ddfsm.xpj
ddfsm/xproj/ver1/version.vbf
ddfsm/ddfsm/ddfsm.exp
ddfsm/ddfsm/workdirs/WORK/Anal.out
ddfsm/ddfsm/workdirs/WORK/DDFSM_SINE.sim
ddfsm/ddfsm/workdirs/WORK/DDFSM_SINE__ACTION.sim
ddfsm/ddfsm/workdirs/WORK/DDFSM_SINE.mra
ddfsm/ddfsm/workdirs/WORK/DDFSM_SINE.syn
ddfsm/ddfsm/workdirs/WORK/DDFSM_SINE__ACTION.syn
ddfsm/ddfsm/workdirs/WORK/Anal.info
ddfsm/ddfsm/workdirs/WORK/DDFSM_COS.sim
ddfsm/ddfsm/workdirs/WORK/DDFSM_COS__ACTION.sim
ddfsm/ddfsm/workdirs/WORK/DDFSM_COS.mra
ddfsm/ddfsm/workdirs/WORK/DDFSM_COS.syn
ddfsm/ddfsm/workdirs/WORK/DDFSM_COS__ACTION.syn
ddfsm/ddfsm/workdirs/WORK/DDFSM.sim
ddfsm/ddfsm/workdirs/WORK/DDFSM.syn
ddfsm/ddfsm/workdirs/WORK/DDFSM__ACTION.sim
ddfsm/ddfsm/workdirs/WORK/DDFSM.mra
ddfsm/ddfsm/workdirs/WORK/DDFSM__ACTION.syn
ddfsm/ddfsm/workdirs/WORK/DDFSM.out
ddfsm/ddfsm/workdirs/WORK/DDFSM.hnl
ddfsm/ddfsm/workdirs/WORK/DDFSM.sts
ddfsm/ddfsm/workdirs/WORK/DDFSM_COS.out
ddfsm/ddfsm/workdirs/WORK/DDFSM_COS.hnl
ddfsm/ddfsm/workdirs/WORK/DDFSM_COS.sts
ddfsm/ddfsm/workdirs/WORK/DDFSM_SINE.out
ddfsm/ddfsm/workdirs/WORK/DDFSM_SINE.hnl
ddfsm/ddfsm/workdirs/WORK/DDFSM_SINE.sts
ddfsm/ddfsm/files/L1.rpt
ddfsm/ddfsm/files/L2.rpt
ddfsm/ddfsm/files/L3.rpt
ddfsm/ddfsm/chips/ver1/ver1.rpt
ddfsm/ddfsm/chips/ver1/ver1.cst
ddfsm/ddfsm/chips/ver1/ver1.ws
ddfsm/ddfsm/chips/ver1-Optimized/ver1-Optimized.ws
ddfsm/ddfsm/chips/ver1-Optimized/ver1-Optimized.cst
ddfsm/ddfsm/chips/ver1-Optimized/ver1-Optimized.rpt
ddfsm/dpm_net/DDFSM.edf
LAST_V/LIB.DLS
LAST_V/U3475593.DLS
LAST_V/ddfsm_v.fit
LAST_V/ddfsm_v.hex
LAST_V/ddfsm_v.hif
LAST_V/ddfsm_v.acf
LAST_V/ddfsm_v.v
LAST_V/ddfsm_v.ndb
LAST_V/ddfsm_v.pin
LAST_V/ddfsm_v.pof
LAST_V/ddfsm_v.snf
LAST_V/ddfsm_v.sof
LAST_V/ddfsm_v(1).cnf
LAST_V/ddfsm_v(2).cnf
LAST_V/ddfsm_v(3).cnf
LAST_V/ddfsm_v(4).cnf
LAST_V/ddfsm_v(5).cnf
LAST_V/ddfsm_v(6).cnf
LAST_V/ddfsm_v(7).cnf
LAST_V/ddfsm_v.cnf
LAST_V/ddfsm_v.ttf
LAST_V/ddfsm_v.scf
LAST_V/ddfsm_v.mmf
LAST_V/ddfsm_v.rpt
VERILOG/LIB.DLS
VERILOG/ddfsm_v.acf
VERILOG/ddfsm_v.v
VERILOG/ddfsm_v.mmf
VERILOG/ddfsm_v.hif
VERILOG/U3475593.DLS
VERILOG/ddfs1218.acf
VERILOG/ddfs1218.v
VERILOG/ddfs1218.hif
VERILOG/ddfsm_v(8).cnf
VERILOG/ddfsm_v(9).cnf
VERILOG/ddfsm_v.rpt
VERILOG/ddfsm_v.cnf
VERILOG/ddfsm_v(1).cnf
VERILOG/ddfsm_v(2).cnf
VERILOG/ddfsm_v(3).cnf
VERILOG/ddfsm_v(4).cnf
VERILOG/ddfsm_v(5).cnf
VERILOG/ddfsm_v(6).cnf
VERILOG/ddfsm_v(7).cnf
VERILOG/ddfsm_v.pin
VERILOG/ddfsm_v.fit
VERILOG/ddfsm_v.ndb
VERILOG/ddfsm_v.snf
VERILOG/ddfsm_v.sof
VERILOG/ddfsm_v.pof
VERILOG/ddfsm_v.hex
VERILOG/ddfsm_v.ttf
VERILOG/ddfsm_v.scf
LAST_VHD/ddfsm.vhd
LAST_VHD/ddfsm_cos.vhd
LAST_VHD/ddfsm_sine.vhd
LAST_VHD/ddfsm.acf
LAST_VHD/ddfsm.mmf
LAST_VHD/U6823242.DLS
LAST_VHD/U6515819.DLS
LAST_VHD/U4114299.DLS
LAST_VHD/ddfsm.cnf
LAST_VHD/DDFSM.sym
LAST_VHD/ddfsm(1).cnf
LAST_VHD/ddfsm(2).cnf
LAST_VHD/ddfsm(3).cnf
LAST_VHD/ddfsm(4).cnf
LAST_VHD/ddfsm(5).cnf
LAST_VHD/ddfsm(6).cnf
LAST_VHD/ddfsm(7).cnf
LAST_VHD/U3938319.DLS
LAST_VHD/U6867407.DLS
LAST_VHD/U4358624.DLS
LAST_VHD/ddfsm(8).cnf
LAST_VHD/DDFSM_SINE.sym
LAST_VHD/U0881594.DLS
LAST_VHD/U4089722.DLS
LAST_VHD/U3480810.DLS
LAST_VHD/ddfsm(9).cnf
LAST_VHD/DDFSM_COS.sym
LAST_VHD/LIB.DLS
LAST_VHD/ddfsm.hif
LAST_VHD/ddfsm.pin
LAST_VHD/ddfsm.rpt
LAST_VHD/ddfsm.fit
LAST_VHD/ddfsm.ndb
LAST_VHD/ddfsm.snf
LAST_VHD/ddfsm.sof
LAST_VHD/ddfsm.pof
LAST_VHD/ddfsm.hex
LAST_VHD/ddfsm.ttf
LAST_VHD/ddfsm.scf
CLA_A/adv_cla.acf
CLA_A/adv_cla.v
CLA_A/adv_cla.hif
CLA_A/adv_cla.cnf
CLA_A/adv_cla.pin
CLA_A/adv_cla.fit
CLA_A/adv_cla.ndb
CLA_A/adv_cla.snf
CLA_A/adv_cla.sof
CLA_A/adv_cla.pof
CLA_A/adv_cla.hex
CLA_A/adv_cla.ttf
CLA_A/adv_cla.scf
CLA_A/U6530243.DLS
CLA_A/LIB.DLS
CLA_A/adv_cla(1).cnf
CLA_A/adv_cla(2).cnf
CLA_A/adv_cla(3).cnf
CLA_A/adv_cla(4).cnf
CLA_A/adv_cla.rpt
CLA_A/adv_cla.mmf
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      [통신, 전자, HDL, Verilog] DDFSM