[컴퓨터구조] 컴퓨터구조

등록일 2003.05.14 MS 파워포인트 (ppt) | 38페이지 | 가격 1,000원

목차

Recap: A Single Cycle Datapath
Recap: Meaning of the Control Signals
Recap: Meaning of the Control Signals
RTL: The Add Instruction
The Single Cycle Datapath during Add
The Single Cycle Datapath during Or Immediate
The Single Cycle Datapath during Load
The Single Cycle Datapath during Store
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본문내용

Recap: A Single Cycle Datapath
Rs, Rt, Rd and Imed16 hardwired into datapath from Fetch Unit
We have everything except control signals (underline)
Today…s lecture will show you how to generate the control signals
Recap: Meaning of the Control Signals
nPC_MUX_sel: 0 꽦 PC <좻 PC + 4 1 꽦 PC <좻 PC + 4 + SignExt(Im16) || 00
Later in lecture: higher-level connection between mux and branch cond
Recap: Meaning of the Control Signals
ExtOp: ¨zero〃, ¨sign〃
ALUsrc: 0 꽦 regB; 1 꽦 immed
ALUctr: ¨add〃, ¨sub〃, ¨or〃
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