combinational logic circuit design(예비)
- 최초 등록일
- 2011.07.09
- 최종 저작일
- 2009.03
- 11페이지/ 한컴오피스
- 가격 1,000원
* 본 문서는 한글 2005 이상 버전에서 작성된 문서입니다.
한글 2002 이하 프로그램에서는 열어볼 수 없으니, 한글 뷰어프로그램(한글 2005 이상)을 설치하신 후 확인해주시기 바랍니다.
소개글
combinational logic circuit design(예비)
목차
1. Objective
2. Theory
(1) Multiplexer and Demultiplexer
(2) Decoder and Encoder
(3) 7-segment controller
3. Question
본문내용
1. Objective
Understand the mechanism of typical combination circuits such as multiplexer, demultiplexer, encoder/decoder. Conducting verilog simulation, and verify these results with FPGA Kit. Also, understand the mechanism of 7-segment controller used to display number in the digital circuit, conduct verilog simulation, and verify it.
2. Theory
(1) Multiplexer and Demultiplexer
① Multiplexer
‘Multiplexing’ is the device that transmits many information through a small number of channel/line. Digital multiplexer is one of the combination circuits that selects one among many inputs, and connects it to output. A particular input is chosen according to selected value. Generally, the multiplexer has 2n input values and n selecting values. And the multiplexer choose one input value according to the combination of n selecting values.
참고 자료
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