32-bit single-cycle MIPS microprocessor design
- 최초 등록일
- 2010.11.11
- 최종 저작일
- 2008.05
- 9페이지/ 한컴오피스
- 가격 1,000원
소개글
32-bit single cycle MIPS microprocessor 를 Quartus를 사용하여 design 했습니다.
목차
1. Objectives
2. Design Requirements
3. Simulation Result
4. Simulation Analysis
5. Discussion
본문내용
1. Objectives
- To learn the basic structure and operation of the single-cycle MIPS processor
2. Design Requirements
32-Bit Single-Cycle MIPS Microprocessor Design
The MIPS processor to be implemented for this lab is identical to the single-cycle MIPS processor in Chapter 5. The requirement for the project is to implement and to complete the datapath and control logic for single-cycle implementation; major tasks include completion of the design and simulation of the eleven instructions: add, sub, and, or, slt, sw, lw, beq, addi, jump, mult. Operation of each instruction follows the descriptions given in the textbook.
The design is implemented hierarchically with the several block structures. The operation and internal structure of each block are identical to the descriptions in the textbook.
3. Simulation Result
① Schematic diagram
※ Initialize the register file
Before we execute the instruction sequence, we have to initialize the register file to check whether operating properly or not. There are INIT_VALUE and INIT_enable inputs to initialize the register file. We set the INIT_enable to high to select the INIT_VALUE in mux. And we set the proper value in INIT_VALUE to write the
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