연세대학교 전기전자 기초실험 09년도 A+ 레포트 결과 9
- 최초 등록일
- 2009.12.17
- 최종 저작일
- 2009.05
- 14페이지/ 한컴오피스
- 가격 1,000원
소개글
연세대학교 전기전자 기초실험 09년도 A+ 레포트
목차
I. Result of Experiment
1. 4-bit adder/subtracter
2. 4-bit ALU
3. Gate Level behavior for 4-bit ALU
II. Result Report
III. 느낀점
IV. Reference
본문내용
II. Result Report
① Survey the strength/weakness of carry look ahead method and compare it with the circuit above.
Carry look ahead method calculates carry before adding or subtracting each bits. So it can reduce the time delay. But it needs the extra circuit to obtain carry. In our circuit, it used typical adder, so the time delay is the time from A, B input to S3 output.
② Find the maximum delay route of 4-bit adder/subtracter, then calculate the maximum operating frequency when this circuit is run by clock.
maximum operating time = S0+S1+S2+S3+Overflow ≃ 76.4ns
maximum operating frequency ≃ 1/76.4 ≃ 13.09MHz
③ Survey other types of adder, then find the fastest one for 32-bit adding operation.
④ If you have troubled in compiling because of errors after setting input/output pin to FPGA I/O with MAX+PLUS II > Floorplan Editor, discuss possible reasons.
There was no error.
참고 자료
◆ www.wikipedia.org/